DP83849IVS-EVK

DP83849IVS-EVK Features/Goals

The DP83849 Demo II features:oMultiple PHY Addresses – Default are 00h (Port A), 01h (Port B) with increment even valuesthrough 30h (Port A) and odd values through 31h (Port B).o9 LEDs – 1 power, 2 INTERRUPT, 6 others (2 LINK, 2 SPEED, 2 ACT/COL) dependant on LEDmode selectedoStrap Options for Ports (A and B) – ED_EN, MDIX_EN, LED_CFG, Auto-NegotiationoFX_EN jumper - Port B onlyoSNI_MODE resistor – Work with MII_MODE pin to set 10 Mb SNI mode. See Strap Options ofdatasheet for details.oMII_MODE resistor – To set RMII mode. See Strap Options section of datasheet for details.oEXTENDER_EN jumper – To set into Extender mode that DP83849IVS and DP83849IFVSsupport. See each datasheet respestively for details.oCLK2MAC_DIS jumper – To disable clock to MAC output.oRESET_N jumper – To allow external reset.oPWR_DWN/INT jumper – To set the device into Interrupt mode. •Connections for the following interfaces:oMII Interfaceo2 x RJ-45, 1 x FX (Port B)oHeader for “ribbon cable” connection to MII/RMII/SNIoJTAG headeroCLK2MAC headeroIntegrity Interface header •Standard PCB layout considerations with regards to clock, MII, and TD/RD •On-board clock – Crystal/Oscillator Dual Footprint – 25/50 MHzoCrystal (default) – Should be depopulated for RMII option.oOscillator – Resistor stuff option for RMII to bring in external 50 MHz oscillator •On-board power supplied by 5V/3V MII connector (A/B), or POE connector (J91) •Dual sided component placement •Low cost