IDT71V2576S150PF

IDT71V2576S150PF Features

Commercial and Industrial:– 150MHz 3.8ns clock access time– 133MHz 4.2ns clock access timeenable (BWE), and byte writes (BWx)compliant)flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ballgrid array (fBGA)

IDT71V2576S150PF Description

The IDT71V2576/78 are high-speed SRAMs organized as 128K x36/256K x 18. The IDT71V2576/78 SRAMs contain write, data, addressand control registers. Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until the end of the writecycle.The burst mode feature offers the highest level of performance to thesystem designer, as the IDT71V2576/78 can provide four cycles of datafor a single address presented to the SRAM. An internal burst addresscounter accepts the first cycle address from the processor, initiating theaccess sequence. The first cycle of output data will be pipelined for onecycle before it is available on the next rising clock edge. If burst modeoperation is selected (ADV=LOW), the subsequent three cycles of outputdata will be available to the user on the next three rising clock edges. Theorder of these three addresses are defined by the internal burst counterand the LBO input pin.The IDT71V2576/78 SRAMs utilize IDT’s latest high-performanceCMOS process and are packaged in a JEDEC standard 14mm x 20mm100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array(BGA) and 165 fine pitch ball grid array (fBGA).