IDT71V25761SA166BG

IDT71V25761SA166BG Features

Commercial and Industrial:– 200MHz 3.1ns clock access time– 183MHz 3.3ns clock access time– 166MHz 3.5ns clock access timeflatpack (TQFP)selected speedsenable (BWE), and byte writes (BWx)

IDT71V25761SA166BG Description

The IDT71V25761 are high-speed SRAMs organized as 128K x 36.The IDT71V25761 SRAMs contain write, data, address and controlregisters. Internal logic allows the SRAM to generate a self-timed writebased upon a decision which can be left until the end of the write cycle.The burst mode feature offers the highest level of performance to thesystem designer, as the IDT71V25761 can provide four cycles of data fora single address presented to the SRAM. An internal burst addresscounter accepts the first cycle address from the processor, initiating theaccess sequence. The first cycle of output data will be pipelined for onecycle before it is available on the next rising clock edge. If burst modeoperation is selected (ADV=LOW), the subsequent three cycles of outputdata will be available to the user on the next three rising clock edges. Theorder of these three addresses are defined by the internal burst counterand the LBO input pin.The IDT71V25761 SRAMs utilizes a high-performance CMOS pro-cess and are packaged in a JEDEC standard 14mm x 20mm 100-pin thinplastic quad flatpack (TQFP).