6V49205BPAGI8

6V49205BPAGI8 Output Features

• 1 – Sys_CCB 3.3V LVCMOS output at 100M/83.33M/80M/66.66M • 1 – DDRCLK 3.3V LVCMOS output at 100M or 66.66M 1 • 1 – 125M 3.3V LVCMOS output • 6 – LP-HCSL PCIe pairs selectable at 100M or 125M • 6 – 25MHz 3.3V LVCMOS outputs • 2 – 2.048M 3.3V LVCMOS outputs • 2 – USB 3.3V LVCMOS outputs at12M or 24M

6V49205BPAGI8 Description

The 6V49205B is a main clock for Freescale P10xx andP20xx-based systems. It has a selectable System CCB clockand 2 DDRCLK speeds – 100M or 66.66M. The 6V49205Balso provides LP-HCSL PCIe outputs for low power andreduced board space.

6V49205BPAGI8 Typical Applications

System Clock for Freescale P10xx and P20xx-based designs

6V49205BPAGI8 Pin Descriptions

PIN #PIN NAMEPIN TYPEDESCRIPTION1X2_25OUTCrystal output, Nominally 25.00MHz.2X1_25INCrystal input, Nominally 25.00MHz.3GNDREFPWRGround pin for the REF outputs.4REF5OUTCopy of crystal input5REF4OUTCopy of crystal input6REF3OUTCopy of crystal input7VDDREFPWRRef, XTAL power supply, nominal 3.3V8GNDREFPWRGround pin for the REF outputs.9REF2OUTCopy of crystal input10REF1OUTCopy of crystal input11^SELPCIE125#_100/REF0I/OLatched input to select the PCIe output frequency/REF0 output.0 = 125M1 = 100M12AVDD12_24PWRPower for 12_24MHz PLL core, and outputs. Nominal 3.3V13^FS0/USB_CLK1I/OFrequency select latch for Sys_CCB / 12 or 24MHz USB clock output. 3.3V. This pin has aninternal pull up resistor.14^FS1/USB_CLK2I/OFrequency select latch for Sys_CCB / 12 or 24MHz USB clock output. 3.3V. This pin has aninternal pull up resistor.15GND12_24PWRGround pin for 12_24M outputs.16GND2.048PWRGround pin for 2.048M outputs.17CK2.048_0OUT2.048M output, nominal 3.3V.18CK2.048_1OUT2.048M output, nominal 3.3V.19VDD2.048PWRPower supply for 2.048M outputs, nominal 3.3V.20AVDD125PWRPower for 125MHz PLL core and output, nominal 3.3V21125MOUT125M output, nominal 3.3V.22GND125MPWRGround pin for 125M outputs.23PCIeT_LR0OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor24PCIeC_LR0OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor25PCIeC_LR1OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor26PCIeT_LR1OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor27VDDPCIePWRPower supply for PCI Express outputs, nominal 3.3V28GNDPCIePWRGround pin for the PCIe outputs.29PCIeC_LR2OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor30PCIeT_LR2OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor31PCIeC_LR3OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor32PCIeT_LR3OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor33AVDDPCIePWRAnalog Power supply for PCI Express clocks, nominal 3.3V34GNDPCIePWRGround pin for the PCIe outputs.35PCIeC_LR4OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor36PCIeT_LR4OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor37PCIeC_LR5OUTComplement clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm seriesresistor38PCIeT_LR5OUTTrue clock of 0.8V differential push-pull PCI_Express pair with integrated 33ohm series resistor39GNDPCIePWRGround pin for the PCIe outputs.40GNDSYSPWRGround pin for the Sys_CCB output41Sys_CCBOUTSystem CCB clock output42AVDDSYSPWRAnalog Power supply for Sys_CCB clock and outputs, nominal 3.3V43VddDDRPWRPower supply for DDR Clock output, nominal 3.3V44^SEL100#_66/DDRCLKI/OLatched input to select the DDR output frequency/DDRCLK output. See note regarding systempower sequencing.0 = 100M1 = 66.666M45GndDDRPWRGround pin for the DDR outputs.46SCLKINClock pin of SMBus circuitry.47SDATAI/OData pin for SMbus circuitry.48VDDREFPWRRef, XTAL power supply, nominal 3.3V