GTL2010BS,118

GTL2010BS,118 2. Features

GTL2010BS,118 1. General description

The Gunning Transceiver Logic - Transceiver Voltage Clamps (GTL-TVC) providehigh-speed voltage translation with low ON-state resistance and minimal propagationdelay. The GTL2010 provides 10 NMOS pass transistors (Sn and Dn) with a common gate(GREF) and a reference transistor (SREF and DREF). The device allows bidirectionalvoltage translations between 1.0 V and 5.0 V without use of a direction pin.When the Sn or Dn port is LOW, the clamp is in the ON-state and a low resistanceconnection exists between the Sn and Dn ports. Assuming the higher voltage is on the Dnport, when the Dn port is HIGH the voltage on the Sn port is limited to the voltage set bythe reference transistor (SREF). When the Sn port is HIGH, the Dn port is pulled to VCC bythe pull-up resistors. This functionality allows a seamless translation between higher andlower voltages selected by the user, without the need for directional control.All transistors have the same electrical characteristics and there is minimal deviation fromone output to another in voltage or propagation delay. This is a benefit over discretetransistor voltage translation solutions, since the fabrication of the transistors issymmetrical. Because all transistors in the device are identical, SREF and DREF can belocated on any of the other ten matched Sn/Dn transistors, allowing for easier boardlayout. The translator's transistors provide excellent ESD protection to lower voltagedevices and at the same time protect less ESD-resistant devices.n 10-bit bidirectional low voltage translatorn Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 Vbuses, which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levelsON-state resistance (Ron) between input and output pins (Sn/Dn)n Provides bidirectional voltage translation with no direction pinn Low 6.5 Wn Supports hot insertionn No power supply required: will not latch upn 5 V tolerant inputsn Low standby currentn Flow-through pinout for ease of printed-circuit board trace routingn ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM perJESD22-A115, and 1000 V CDM per JESD22-C101n Packages offered: TSSOP24, HVQFN24

GTL2010BS,118 3. Applications

GTL2010BS,118 6.2 Pin description