ZL30160GGG

ZL30160GGG Features

• Four independent clock channels • Programmable synthesizers generate any clock-rate from 1 kHz to 750 MHz • Two precision synthesizers generate clocks withjitter below 0.7 ps RMS for 10 G PHYs • Two general purpose synthesizers generate a widerange of digital bus clocks • Programmable digital PLLs synchronize to anyclock rate from 1 kHz to 750 MHz • Flexible two-stage architecture translates betweenarbitrary data rates, line coding rates and FECrates • Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz,112 Hz, 224 Hz, 448 Hz or 896 Hz • Automatic hitless reference switching and digitalholdover on reference fail • Four reference inputs configurable as single endedor differentialOrdering InformationZL30160GGG 100 Pin LBGAZL30160GGG2 100 Pin LBGA*TraysTrays*Pb Free Tin/Silver/Copper • Eight LVPECL outputs and four LVCMOS outputs • Eight outputs configurable as LVCMOS orLVDS/LVPECL/HCSL • Operates from a single crystal resonator or clockoscillator • Configurable via SPI/I2C interface

ZL30160GGG Applications

• 10 Gigabit line cards • Synchronous Ethernet, 10 GBASE-R and10 GBASE-W • OTN multiplexers and transponders • SONET/SDH, Fibre Channel, XAUIFigure 1 - Functional Block Diagram1