ZL30155GGG

ZL30155GGG Features

• Two independent clock channels • Programmable synthesizers generate any clock-rate from 1 kHz to 750 MHz • Two precision synthesizers generate clocks withjitter below 0.7 ps RMS for 10 G PHYs • Programmable digital PLLs synchronize to anyclock rate from 1 kHz to 750 MHz • Flexible two-stage architecture translates betweenarbitrary data rates, line coding rates and FECratesOrdering InformationZL30155GGG100 Pin LBGAZL30155GGG2 100 Pin LBGA*TraysTrays*Pb Free Tin/Silver/Copper • Operates from a single crystal resonator or clockoscillator • Configurable via SPI/I2C interface

ZL30155GGG Applications

• Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz, • 10 Gigabit line cards112 Hz, 224 Hz, 448 Hz or 896 Hz • Synchronous Ethernet, 10 GBASE-R and • Automatic hitless reference switching and digital10 GBASE-Wholdover on reference fail • Four reference inputs configurable as single endedor differential • Eight LVPECL outputs and four LVCMOS outputs • OTN multiplexers and transponders • SONET/SDH, Fibre Channel, XAUIFigure 1 - Functional Block Diagram1