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Obsolete
Intersil
Commencing January 1, 2018, Renesas and Intersil will unify, augmenting semiconductor potentials. This fusion melds Renesas' lauded MCU and SoC proficiencies with Intersil's power management and precision analog mastery. Resultant growth spans automotive, industrial, and broader domains, facilitating agile response to patrons' needs. The amalgamation, initiated in February 2017, blossomed in July under "One Global Renesas," catalyzing a synergistic effect. Join Renesas in fortifying its semiconductor market eminence.
Bostock Quality Assurance
ZL1505ALNFT Features
• High-speed, high-current drivers for synchronous N-channelMOSFETs • Adaptive dead-time control optimizes efficiency when usedwith Digital-DC controllers • Integrated 30V bootstrap Schottky diode • Capable of driving 40A per phase • Supports switching frequency up to 1.4MHz- >4A source, >5A sink low-side driver- >3A source/sink high-side driver- <10ns rise/fall times, low propagation delay • Adjustable gate drive strength optimizes efficiency fordifferent VIN, VOUT, IOUT, FSW and MOSFET combinations • Internal non-overlap watchdog prevents shoot-throughcurrents
ZL1505ALNFT Applications*(see page 12)
• High efficiency, high-current DC/DC buck converters withdigital control and PMBus™ • Multi-phase digital DC/DC converters with phaseadding/dropping • Power train modules • Synchronous rectification for secondary side isolated powerconverters
ZL1505ALNFT Pin Descriptions
PIN NUMBERPIN NAMETYPE (Note 3)DESCRIPTION1HSELIHigh-side gate drive current selector. Connect to BST for maximum gate drive current;connect to SW for 50% of maximum gate drive current.2GHOOutput of high-side gate driver. Connect to the gate of high-side FET.3SWI/OPhase node. Return path for high-side driver. Connect to source of high-side FET and drainof low-side FET.4PWMHIHigh-side PWM control input.5PWMLILow-side PWM control input.6LSELILow-side gate drive current selector. Connect to VDD for maximum gate drive current;connect to GND for 50% of maximum gate drive current.7GNDPWRGround. All signals return to this pin.8GLOOutput of low-side gate driver. Connect to the gate of low-side FET.9VDDPWRGate drive bias supply. Connect a high-quality bypass capacitor from this pin to GND.10BSTPWRBootstrap supply. Connect external capacitor to SW node.EPADGNDPWRGround.NOTE:3. I = Input, O = Output, PWR = Power OR Ground.
Product Attributes
TYPE | DESCRIPTION | Select all |
---|---|---|
Supply Voltage | 4.5V ~ 7.5V | |
Voltage Levels for Logic Low and High | 1.7V, 3.4V | |
Current - Peak Output (Source, Sink) | 3.2A, 3.2A | |
Input Type | Non-Inverting | |
Package | Tape & Reel (TR) | |
Maximum High Side Voltage (Bootstrap) | 30 V | |
Product Status | Obsolete | |
Rise / Fall Time (Typical) | 5.3ns, 4.8ns | |
Programmable | Not Verified | |
Operating Temperature | -40°C ~ 125°C (TJ) | |
Driven Configuration | Half-Bridge | |
Mounting Type | Surface Mount | |
Channel Type | Independent | |
Package / Case | 10-VFDFN Exposed Pad | |
Number of Drivers | 2 | |
Supplier Device Package | 10-DFN (3x3) | |
Gate Type | N-Channel MOSFET |
Obsolete
Intersil
Commencing January 1, 2018, Renesas and Intersil will unify, augmenting semiconductor potentials. This fusion melds Renesas' lauded MCU and SoC proficiencies with Intersil's power management and precision analog mastery. Resultant growth spans automotive, industrial, and broader domains, facilitating agile response to patrons' needs. The amalgamation, initiated in February 2017, blossomed in July under "One Global Renesas," catalyzing a synergistic effect. Join Renesas in fortifying its semiconductor market eminence.