HC1S80F1020AYP

HC1S80F1020AYP Introduction

HardCopy® Stratix® structured ASICs, Altera’s second-generationHardCopy structured ASICs, are low-cost, high-performance deviceswith the same architecture as the high-density Stratix FPGAs. Thecombination of Stratix FPGAs for prototyping and design verification,HardCopy Stratix devices for high-volume production, and theQuartus® II design software beginning with version 3.0, provide acomplete and powerful alternative to ASIC design and development.HardCopy Stratix devices are architecturally equivalent and have thesame features as the corresponding Stratix FPGA. They offer pin-to-pincompatibility using the same package as the corresponding Stratix FPGAprototype. Designers can prototype their design to verify functionalitywith Stratix FPGAs before seamlessly migrating the proven design to aHardCopy Stratix structured ASIC.The Quartus II software provides a complete set of inexpensive andeasy-to-use tools for designing HardCopy Stratix devices. Using thesuccessful and proven methodology from HardCopy APEX™ devices,Stratix FPGA designs can be seamlessly and quickly migrated to alow-cost ASIC alternative. Designers can use the Quartus II software todesign HardCopy Stratix devices to obtain an average of 50% higherperformance and up to 40% lower power consumption than can beachieved in the corresponding Stratix FPGAs. The migration process isfully automated, requires minimal customer involvement, and takesapproximately eight weeks to deliver fully tested HardCopy Stratixprototypes.The HardCopy Stratix devices use the same base arrays across multipledesigns for a given device density and are customized using the top twometal layers. The HardCopy Stratix family consists of the HC1S25,HC1S30, HC1S40, HC1S60, and HC1S80 devices. Table 1–1 provides thedetails of the HardCopy Stratix devices.

HC1S80F1020AYP 1. Introduction to HardCopy